Avago Technologies LSI53C1010R - Manual (Page 350)

6-60 Specifications
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Figure 6.38 Target Asynchronous Receive
Table 6.42 Target Asynchronous Receive
Symbol Parameter Min Max Unit
t
1
SREQ/ deasserted from SACK/ asserted 5 – ns
t
2
SREQ/ asserted from SACK/ deasserted 5 – ns
t
3
Data setup to SACK/ asserted 0 – ns
t
4
Data hold from SREQ/ deasserted 0 – ns
Valid n Valid n + 1
n + 1
n + 1
n
n
t
1
t
2
t
3 t
4
SREQ/
SACK/
SD[15:0]/,
SDP[1:0]/
Table 6.43 SCSI-1 Transfers (SE 5.0 Mbytes)
Symbol Parameter Min Max Unit
t
ST1
Send SREQ/ or SACK/ assertion pulse width 80 – ns
t
ST2
Send SREQ/ or SACK/ deassertion pulse width 80 – ns
t
ST1
Receive SREQ/ or SACK/ assertion pulse width 70 – ns
t
ST2
Receive SREQ/ or SACK/ deassertion pulse width 70 – ns
t
ST3
Send data setup to SREQ/ or SACK/ asserted 24 – ns
t
ST4
Send data hold from SREQ/ or SACK/ asserted 54 – ns
t
ST5
Receive data setup to SREQ/ or SACK/ asserted 14 – ns
t
ST6
Receive data hold from SREQ/ or SACK/ asserted 24 – ns