9 mad bus programming, Mad bus programming, Section 3.9, “mad bus programming – Avago Technologies LSI53C1010R User Manual
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Signal Descriptions
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
3.9 MAD Bus Programming
The MAD[7:0] pins, in addition to serving as the address/data bus for the
local memory interface, also program power-up options for the chip. A
particular option is programmed by allowing the internal pull-down
current sink to pull the pin LOW at reset or by connecting a 4.7 k
Ω
resistor between the appropriate MAD[x] pin and V
DD
. The pull-down
resistors require that HC or HCT external components are used for the
memory interface. A description of the MAD bus pins follows:
•
MAD[7], Serial EEPROM programmable option – When pulled
LOW by the internal pull-down current sink, the automatic data
download is enabled. When pulled HIGH by an external resistor, the
automatic data download is disabled. Refer to
Section 2.4, “Serial EEPROM Interface,”
and the
and
register descriptions.
•
MAD[6] – Reserved.
•
MAD[5] – Reserved.
•
MAD[4], INTA/ routing enable – Placing a pull-up resistor on this
pin causes SCSI Function B interrupt requests to appear on the
INTA/ pin, along with SCSI Function A interrupt requests, instead of
on INTB/. Placing a pull-up resistor on this pin also programs the
SCSI Function B
register in PCI configuration space
to 0x01 instead of 0x02.
Placing no resistor on this pin causes SCSI Function B interrupt
requests to appear on the INTB/ pin and programs the SCSI Function B
register in PCI configuration space to 0x02.
•
MAD[3:1] – These pins set the size of the external expansion ROM
device attached.
provides the encoding for these pins. A
“0” indicates a pull-down resistor is attached while a “1” indicates a
pull-up resistor attached.