Scsi control two (scntl2), Register: 0x02 – Avago Technologies LSI53C1010R User Manual
Page 148
4-30
Registers
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
An unexpected disconnect condition clears IARB with it
attempting arbitration. Refer to the SCSI Disconnect
Unexpected bit (
, bit 7) for
details about expected versus unexpected disconnects.
It is possible to abort an immediate arbitration sequence.
First, set the Abort bit in the
Interrupt Status Zero (ISTAT0)
register. Then one of two things eventually happens:
•
The Won Arbitration bit (
,
bit 2) is set. In this case, the Immediate Arbitration bit
needs to be cleared. This completes the abort
sequence and disconnects the chip from the SCSI
bus. If it is not acceptable to go to the Bus Free phase
immediately following the arbitration phase, it is
possible to perform a low level selection instead.
•
The abort completes because the LSI53C1010R
SCSI function loses arbitration. This is detected by the
clearing of the Immediate Arbitration bit. Do not use
the Lost Arbitration bit (
bit 3) to detect this condition. In this case take no
further action.
R
Reserved
0
Register: 0x02
SCSI Control Two (SCNTL2)
Read/Write
SDU
SCSI Disconnect Unexpected
7
This bit is valid in the initiator mode only. When this bit is
set, the SCSI core is not expecting the SCSI bus to enter
the Bus Free phase. If it does, an unexpected disconnect
error is generated (refer to the Unexpected Disconnect bit
in the
SCSI Interrupt Status Zero (SIST0)
register, bit 2).
During normal SCRIPTS mode operation, this bit is set
automatically whenever the SCSI core is reselected, or
successfully selects another SCSI device. The SDU bit
should be cleared with a register write (Move 0x00 To
) before the SCSI core
7
6
5
4
3
2
1
0
SDU
CHM
R
WSS
VUE0
VUE1
WSR
0
0
0
0
0
0
0
0