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Table 6.14 external clock, Figure6.8 external clock, External clock – Avago Technologies LSI53C1010R User Manual

Page 301: Table 6.14, Figure 6.8

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AC Characteristics

6-11

Version 2.2

Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.

Figure 6.8

External Clock

Table 6.15

and

Figure 6.9

provide Reset Input timing data.

Table 6.14

External Clock

Symbol

Parameter

66 MHz PCI

33 MHz PCI

1

1. The minimum PCI Clock frequency is 33 MHz.

Unit

Min

Max

Min

Max

t

1

PCI Bus clock period

15

30

30

30

ns

SCSI clock period

25

25

25

25

ns

t

2

PCI CLK LOW time

2

2. Duty cycle not to exceed 60/40.

6

11

ns

SCLK LOW time

10

15

10

15

ns

t

3

PCI CLK HIGH time

6

11

ns

SCLK HIGH time

10

15

10

15

ns

t

4

PCI CLK slew rate

1.5

4

1

4

V/ns

CLK, SCLK 1.4 V

t

1

t

3

t

4

t

2