Avago Technologies LSI53C1010R User Manual
Page 268
5-20
SCSI SCRIPTS Instruction Set
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Clear Instruction
When the SACK/ or SATN/ bits are cleared, the
corresponding bits are cleared in the
SCSI Output Control Latch (SOCL)
register. When the
target bit is cleared, the corresponding bit in the
register is cleared. When
the carry bit is cleared, the corresponding bit in the ALU
is cleared.
RA
Relative Addressing Mode
26
When this bit is set, the 24-bit signed value in the
register is used as a relative
displacement from the current
address. Use this bit only
in conjunction with the Select, Reselect, Wait Select, and
Wait Reselect instructions. The Select and Reselect
instructions can contain an absolute alternate jump
address or a relative transfer address.
TI
Table Indirect Mode
25
When this bit is set, the 24-bit signed value in the
register is added to the value
in the
register, and used
as an offset relative to the value in the Data Structure
Address (DSA) register. The
value, SCSI ID,
synchronous offset and synchronous period are loaded
from this address. Prior to the start of an I/O, load the
with the base address of
the I/O data structure. Any address on a Dword boundary
is allowed. After a Table Indirect opcode is fetched, the
is added to the 24-bit
signed offset value from the opcode to generate the
address of the required data. Both positive and negative
offsets are allowed. A subsequent fetch from that address
brings the data values into the chip.
SCRIPTS can directly execute operating system I/O data
structures, saving time at the beginning of an I/O
operation. The I/O data structure can begin on any Dword
boundary and may cross system segment boundaries.
There are two restrictions on the placement of data in
system memory: