Avago Technologies LSI53C1010R - Manual (Page 200)

4-82 Registers
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Register: 0x49
SCSI Timer One (STIME1)
Read/Write
R Reserved 7
HTHBA Handshake-to-Handshake Timer Bus Activity
Enable
6
Setting this bit causes this timer to begin testing for SCSI
REQ/ and ACK/ activity as soon as SBSY/ is asserted,
regardless of the agents participating in the transfer.
GENSF General Purpose Timer Scale Factor 5
Setting this bit causes this timer to shift by a factor of 16.
Refer to the
SCSI Timer Zero (STIME0) register
description for details.
7 6 5 4 3 0
R HTHBA GENSF HTHSF GEN[3:0]
x 0 0 0 0 0 0 0