Avago Technologies LSI53C1010R User Manual
Page 251
SCSI SCRIPTS
5-3
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
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The host CPU, through programmed I/O, gives the
register (in the Operating register file)
the starting address in main memory that points to a SCSI SCRIPTS
program for execution.
•
Loading the
register causes the
LSI53C1010R to fetch its first instruction at the address just loaded.
This fetch is from main memory or the internal RAM, depending on
the address.
•
The LSI53C1010R typically fetches two Dwords (64 bits) and
decodes the high order byte of the first Dword as a SCRIPTS
instruction. If the instruction is a Block Move, the lower three bytes
of the first Dword are stored and interpreted as the number of bytes
to move. The second Dword is stored and interpreted as the 32-bit
beginning address in main memory to which the move is directed.
•
For a SCSI send operation, the LSI53C1010R waits until there is
enough space in the DMA FIFO to transfer a programmable size
block of data. For a SCSI receive operation, it waits until enough data
is collected in the DMA FIFO for transfer to memory. At this point, the
LSI53C1010R requests use of the PCI bus again to transfer the data.
•
When the LSI53C1010R is granted the PCI bus, it executes (as a bus
master) a burst transfer (programmable size) of data, decrements the
internally stored remaining byte count, increments the address
pointer, and then releases the PCI bus. The LSI53C1010R stays off
the PCI bus until the FIFO can again hold (for a write) or has
collected (for a read) enough data to repeat the process.
The process repeats until the internally stored byte count has reached
zero. The LSI53C1010R releases the PCI bus and then performs another
SCRIPTS instruction fetch cycle, using the incremented stored address
maintained in the
register. Execution of
SCRIPTS instructions continues until an error condition occurs or an
interrupt SCRIPTS instruction is received. At this point, the
LSI53C1010R interrupts the host CPU and waits for further servicing by
the host system. It can execute independent Block Move instructions
specifying new byte counts and starting locations in main memory. In this
manner, the LSI53C1010R performs scatter/gather operations on data
without requiring help from the host program, generating a host interrupt,
or programming of an external DMA controller.
provides an overview of SCRIPTS operation.