Package drawings 6-73 – Avago Technologies LSI53C1010R User Manual
Page 363

Package Drawings
6-73
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Table 6.52
Alphanumeric List by BGA Position (Cont.)
P1
VDD_IO
P2
NC
P3
A_SD7+
P4
A_SDP0
−
P5
A_SDP0+
P11
VSS_IO
P12
VSS_IO
P13
VSS_IO
P14
VSS_IO
P15
VSS_IO
P16
VSS_IO
P22
AD42
P23
AD41
P24
AD39
P25
AD38
P26
VSS_IO
R1
NC
R2
A_SD5+
R3
VSS_IO
R4
A_SD7
−
R5
A_SD6+
R11
VSS_IO
R12
VSS_IO
R13
VSS_IO
R14
VSS_IO
R15
VSS_IO
R16
VSS_IO
R22
AD43
R23
AD40
R24
VDD_IO
R25
AD44
R26
AD36
T1
A_VDDBIAS
T2
A_SD5
−
T3
VDD_IO
T4
A_SD4+
T5
A_SD6
−
T11
VSS_IO
T12
VSS_IO
T13
VSS_IO
T14
VSS_IO
T15
VSS_IO
T16
VSS_IO
T22
AD47
T23
AD46
T24
VSS_IO
T25
AD45
T26
AD37
U1
VSS_IO
U2
A_SD4
−
U3
A_SD2+
U4
A_SD3+
U5
A_SD3
−
U22
AD55
U23
AD49
U24
AD52
U25
AD48
U26
VDD_IO
V1
VDD_IO
V2
A_SD2
−
V3
A_SD0+
V4
A_SD1
−
V5
A_SD1+
V22
AD56
V23
AD53
V24
AD54
V25
AD51
V26
VSS_IO
W1
A_SDP1+
W2
A_SDP1
−
W3
VSS_IO
W4
A_SD0
−
W5
A_SD15+
W22
AD63
W23
AD59
W24
VDD_IO
W25
NC
W26
AD50
Y1
A_SD15
−
Y2
A_SD14+
Y3
VDD_IO
Y4
IDDTN
Y5
NC
Y22
NC
Y23
C_BE5/
Y24
VSS_IO
Y25
AD58
Y26
AD57
AA1
VSS_IO
AA2
A_SD14
−
AA3
A_SD13+
AA4
NC
AA5
NC
AA22
NC
AA23
C_BE7/
AA24
PAR64
AA25
AD60
AA26
VDD_IO
AB1
VDD_IO
AB2
A_SD13
−
AB3
NC
AB4
NC
AB5
NC
AB6
VSSA
AB7
VSSC
AB8
VSSC
AB9
ALT_INTB/
AB10
RST/
AB11
AD28
AB12
AD24
AB13
C_BE3/
AB14
C_BE2/
AB15
FRAME/
AB16
STOP/
AB17
AD12
AB18
AD11
AB19
AD5
AB20
ACK64/
AB21
NC
AB22
NC
AB23
VSSC
AB24
VSSC
AB25
AD62
AB26
VSS_IO
AC1
A_SD12+
AC2
ENABLE66
AC3
VSS_IO
AC4
NC
AC5
M66EN
AC6
TCK_CHIP
AC7
VDDC
AC8
INTA/
AC9
CLK
AC10
NC
AC11
AD27
AC12
AD23
AC13
IDSEL
AC14
AD16
AC15
AD17
AC16
DEVSEL/
AC17
SERR/
AC18
AD13
AC19
AD8
AC20
AD2
AC21
AD0
AC22
NC
AC23
NC
AC24
VDD_IO
AC25
C_BE6/
AC26
AD61
AD1
A_SD12–
AD2
NC
AD3
NC
AD4
VDD_IO
AD5
TEST_RST/
AD6
TDO_CHIP
AD7
VSS_IO
AD8
VDD_IO
AD9
NC
AD10
REQ/
AD11
VSS_IO
AD12
VDD_IO
AD13
AD22
AD14
NC
AD15
VSS_IO
AD16
VDD_IO
AD17
AD15
AD18
NC
AD19
VSS_IO
AD20
VDD_IO
AD21
AD4
AD22
REQ64/
AD23
VSS_IO
AD24
NC
AD25
VDDC
AD26
C_BE4/
AE1
VSS_IO
AE2
VDDA
AE3
VDDC
AE4
TMS_CHIP
AE5
NC
AE6
NC
AE7
INTB/
AE8
GNT/
AE9
AD31
AE10
AD29
AE11
AD26
AE12
AD25
AE13
AD21
AE14
AD18
AE15
IRDY/
AE16
TRDY/
AE17
PERR/
AE18
C_BE1/
AE19
AD14
AE20
AD9
AE21
C_BE0/
AE22
AD6
AE23
AD1
AE24
VDDC
AE25
NC
AE26
VDD_IO
AF1
VDD_IO
AF2
VSS_IO
AF3
TDI_CHIP
AF4
NC
AF5
VDD_IO
AF6
VSS_IO
AF7
ALT_INTA/
AF8
AD30
AF9
VDD_IO
AF10
VSS_IO
AF11
AD20
AF12
NC
AF13
VDD_IO
AF14
VSS_IO
AF15
NC
AF16
AD19
AF17
VDD_IO
AF18
VSS_IO
AF19
PAR
AF20
AD10
AF21
VDD_IO
AF22
VSS_IO
AF23
AD7
AF24
AD3
AF25
VDD_IO
AF26
VSS_IO
Signal
BGA
Name
Pos
Signal
BGA
Name
Pos
Signal
BGA
Name
Pos
Signal
BGA
Name
Pos
Signal
BGA
Name
Pos