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2 second dword, Figure5.3 block move instruction – second dword, 3 third dword – Avago Technologies LSI53C1010R User Manual

Page 263: Figure5.4 block move instruction – third dword, Second dword, Third dword, Block move instruction – second dword, Block move instruction – third dword

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Block Move Instructions

5-15

Version 2.2

Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.

5.2.2 Second Dword

This section describes the structure of the second SCSI SCRIPTS
Dword.

Figure 5.3

Block Move Instruction – Second Dword

Start Address

[31:0]

This 32-bit field specifies the starting address of the data
to move to/from memory. This field is copied to the

DMA Next Address (DNAD)

register. When the

LSI53C1010R transfers data to or from memory, the DNAD
register is incremented by the number of bytes transferred.

When bit 29 is set, indicating indirect addressing, this
address is a pointer to an address in memory that points
to the data location. When bit 28 is set, indicating table
indirect addressing, the value in this field is an offset into a
table pointed to by the

Data Structure Address (DSA)

. The

table entry contains byte count and address information.

5.2.3 Third Dword

This section describes the structure of the third SCSI SCRIPTS Dword.

Figure 5.4

Block Move Instruction – Third Dword

Start Address

[63:32]

This 32-bit field specifies the upper Dword of a 64-bit
starting address of data to move to/from memory. This
field is copied to the

Dynamic Block Move Selector (DBMS)

register. The

EN64DBMV bit in the

Chip Control One (CCNTL1)

register must be set for this Dword to be fetched.

31

0

DSPS Register

31

0

DBMS Register