2 second dword, 4 read/write instructions, 1 first dword – Avago Technologies LSI53C1010R User Manual
Page 272: Figure5.7 read/write instruction – first dword, Second dword, Read/write instructions, First dword, Second 32-bit word of the i/o instruction, Read/write instruction – first dword, Section 5.4, “read/write instructions
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SCSI SCRIPTS Instruction Set
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
5.3.2 Second Dword
This section describes the second Dword of the I/O Instruction register.
Figure 5.6
Second 32-Bit Word of the I/O Instruction
SA
Start Address
[31:0]
This 32-bit field contains the memory address to fetch the
next instruction if the selection or reselection fails.
If relative or table relative addressing is used, this value
is a 24-bit signed offset relative to the current
register value.
5.4 Read/Write Instructions
The Read/Write instruction supports addition, subtraction, and comparison
of two separate values within the chip. It performs the desired operation
on the specified register and the
SCSI First Byte Received (SFBR)
register and stores the result back to the
specified register or to the SFBR. If the COM bit (
,
bit 0) is cleared, Read/Write instructions cannot be used.
5.4.1 First Dword
This section describes the first Dword of the Read/Write Instruction register.
Figure 5.7
Read/Write Instruction – First Dword
IT[1:0]
Instruction Type – Read/Write Instruction
[31:30]
The Read/Write instruction uses operator bits [26:24] in
conjunction with the opcode bits to determine which
instruction is currently selected.
31
0
DSPS Register
31 30 29
27 26
24 23 22
16 15
8
7
6
0
DCMD Register
DBC Register
IT[1:0] OPC[2:0]
O[2:0]
D8 Register Address [6:0]
Immediate Data
A7
R
0
1
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
0
0
0
0
0
0
0