Registers: 0xa4–0xa7, Registers: 0xa8–0xab – Avago Technologies LSI53C1010R User Manual
Page 247
SCSI Shadow Registers
4-129
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Registers: 0xA4–0xA7
Shadowed Memory Move Write Selector (MMWS)
Read/Write
MMWS
Shadowed Memory Move Write Selector
[31:0]
When the PCI Configuration Info Enable bit in the
register is set, the
MMWS register is placed in the shadow mode. When
read in this mode, the MMWS register returns bits [31:0]
of the SCRIPT RAM PCI
Base Address Register Four (BAR4) (SCRIPTS RAM)
in
bits [31:0] of the MMWS register. Writes to the MMWS
register have no effect. Clearing the PCI Configuration
Info Enable bit causes the MMWS register to return to
normal operation.
Registers: 0xA8–0xAB
Shadowed SCRIPT Fetch Selector (SFS)
Read/Write
SFS
Shadowed SCRIPT Fetch Selector
[31:0]
When the PCI Configuration Info Enable bit in the
register is set, the SCRIPT
Fetch Selector register is placed in shadow mode. When
read in this mode, bits [23:16] of this register return the
PCI
register value and bits [15:0] return
the PCI
register value. Writes to the
register have no effect.
Clearing the PCI Configuration Info Enable bit causes the
SFS register to return to normal operation.
31
0
MMWS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
31
0
SFS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0