Section 2.2.5.1, “ultra160 features – Avago Technologies LSI53C1010R User Manual

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SCSI Functional Description

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Version 2.2

2.2.5.1 Ultra160 Features

Domain Validation – Domain validation is a procedure in which a host
queries a device to determine its ability to communicate at the negotiated
Ultra160 data rate. In software, the following steps are performed to
ensure the selected device can successfully transfer data at the
negotiated speed.

Step 1.

Select a device.

Step 2.

Issue Inquiry command.

Step 3.

Issue Parallel Protocol Request (PPR) message.

Step 4.

Issue Write Buffer command.

Step 5.

Issue Read Buffer command.

Step 6.

Examine the data pattern to ensure validity.

If the commands complete successfully with no CRC errors, bus hangs,
or data pattern errors, then the negotiated speed is valid.

CRC – CRC is the error detecting code used in Ultra160 SCSI. Four
bytes are transferred with data to increase the reliability of data transfers.
CRC is used in the DT Data-In and DT Data-Out phases only. Because
CRC is implied with DT mode and only works with DT mode, the DT
setting can be used for CRC.

DT Clocking – Ultra160 SCSI implements DT clocking to provide
speeds up to 80 megatransfers/s. DT clocking means that the data is
sampled on both the asserting and deasserting edge of REQ/ACK. DT
clocking is only valid using a LVD SCSI bus.

In order to support DT clocking, there are two new phases for the SCSI
bus. The old Data-In and Data-Out phases are now called
single transition (ST) Data-In and ST Data-Out. The new phases are
DT Data-In and DT Data-Out. The use of DT and ST phases implies that
the SCRIPTS engine may use a different jump point for DT or ST.

Table 2.3

illustrates SCSI signal configuration for these phases.