Avago Technologies LSI53C1010R User Manual
Page 266
5-18
SCSI SCRIPTS Instruction Set
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
bit in the
register is also
set. When the carry bit is set, the corresponding bit in the
Arithmetic Logic Unit (ALU) is set.
Note:
None of the signals are set on the SCSI bus in target mode.
Clear Instruction
When the SACK/ or SATN/ bits are cleared, the
corresponding bits are cleared in the
SCSI Output Control Latch (SOCL)
register. Do not set
SACK/ or SATN/ except for testing purposes. When the
target bit is cleared, the corresponding bit in the
register is cleared. When
the carry bit is cleared, the corresponding bit in the ALU
is cleared.
Note:
None of the signals are cleared on the SCSI bus in the
target mode.
Initiator Mode
Select Instruction
The LSI53C1010R arbitrates for the SCSI bus by
asserting the SCSI ID stored in the
register. If it loses arbitration, it tries again during the next
available arbitration cycle without reporting any lost
arbitration status.
If the LSI53C1010R wins arbitration, it attempts to select
the SCSI device whose ID is defined in the destination ID
field of the instruction. When the LSI53C1010R wins
arbitration, it fetches the next instruction from the address
pointed to by the
register.
This way the SCRIPTS can move to the next instruction
OPC2
OPC1
OPC0 Instruction Defined
0
0
0
Select
0
0
1
Wait Disconnect
0
1
0
Wait Reselect
0
1
1
Set
1
0
0
Clear