Avago Technologies LSI53C1010R - Manual (Page 128)

4-10 Registers
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
requires 1024 bytes of memory space. For detailed
information on the operation of this register, refer to the
PCI 2.2 specification.
Registers: 0x18–0x1B
Base Address Register Two (BAR2) (MEMORY)
Read/Write
BAR2 Base Address Register Two [31:0]
This base address register, in conjunction with
Base Address Register One (BAR1) (MEMORY) , maps
SCSI operating registers into memory space and
represents the upper 32 bits of the memory address. The
default value of this register is 0x00000000. The
LSI53C1010R requires 1024 bytes of memory space. For
detailed information on the operation of this register, refer
to the PCI 2.2 specification.
Registers: 0x1C–0x1F
Base Address Register Three (BAR3) (SCRIPTS RAM)
Read/Write
BAR3 Base Address Register Three [31:0]
This base address register, in conjunction with
Base Address Register Four (BAR4) (SCRIPTS RAM) ,
maps the SCRIPTS RAM into memory space and
represents the lower 32 bits of the memory address.
Bits [12:0] are hardwired to 0b0000000000100. The
default value of this register is 0x00000004. The
LSI53C1010R requires 8192 bytes of memory space for
SCRIPTS RAM. For detailed information on the operation
of this register, refer to the PCI 2.2 specification.
31 0
BAR2
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
31 0
BAR3
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0