Avago Technologies LSI53C1010R - Manual (Page 145)

SCSI Registers 4-27
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
CRCOK CRC Request OK 2
This bit indicates it is acceptable to force a CRC request.
This bit is set only if a CRC request has been sent and
no data has been transferred since the request. This bit
can determine whether it is necessary to send a CRC
request at the end of a data transfer, prior to changing
phases in target mode. This bit may prevent back-to-back
CRC conditions.
AAP Assert SATN/ on Parity/CRC/AIP Error 1
When this bit is set, the LSI53C1010R SCSI function
automatically asserts the SATN/ signal upon detection of
a parity error or CRC error. SATN/ is only asserted in the
initiator mode. The SATN/ signal is asserted before
deasserting SACK/ during the byte transfer with the parity
error. Also set the Enable Parity/CRC/AIP Checking bit
for the LSI53C1010R SCSI function to assert SATN/ in
this manner. A parity error or CRC error is detected on
data received from the SCSI bus.
If the Assert SATN/ on Parity/CRC/AIP Error bit is cleared
or the Enable Parity/CRC/AIP Checking bit is cleared,
SATN/ is not automatically asserted on the SCSI bus
when a Parity/CRC/AIP error is received.
TRG Target Mode 0
This bit determines the default operating mode of the
LSI53C1010R SCSI function. The user must manually set
the target or initiator mode. This is done using the
SCRIPTS language (
SET TARGET or CLEAR TARGET ).
When this bit is set, the chip is a target device. When this
bit is cleared, the LSI53C1010R SCSI function is an
initiator device.
Caution: Writing this bit while not connected may cause the loss of
a selection or reselection due to the changing of target or
initiator modes.