Avago Technologies LSI53C1010R - Manual (Page 353)

SCSI Timing Diagrams 6-63
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Table 6.47 SCSI-2 Fast Transfers 10.0 Mbytes (8-Bit Transfers) or 20.0 Mbytes
(16-Bit Transfers) 40 MHz Clock
Symbol Parameter Min Max Unit
t
DT1
Send SREQ/ assertion pulse width 92 – ns
t
DT2
Send SREQ/ deassertion pulse width 92 – ns
t
DT1
Receive SREQ/ assertion pulse width 80 – ns
t
DT2
Receive SREQ/ deassertion pulse width 80 – ns
t
DT3
Send data setup to SREQ/ transition 40 – ns
t
DT4
Send data hold from SREQ/ transition 40 – ns
t
DT5
Receive data setup to SREQ/ transition 10 – ns
t
DT6
Receive data hold from SREQ/ transition 10 – ns
t
DT7
Send CRC Request Setup to SREQ/ transition 50 – ns
t
DT8
Send CRC Request Hold to SREQ/ transition 40 – ns
t
DT9
Receive CRC Request Setup to SREQ/ transition 17 – ns
t
DT10
Receive CRC Request Hold to SREQ/ transition 10 – ns
Table 6.48 Ultra SCSI SE Transfers 20.0 Mbytes (8-Bit Transfers) or 40.0 Mbytes
(16-Bit Transfers) Quadrupled 40 MHz Clock
Symbol Parameter Min Max Unit
t
DT1
Send SREQ/ assertion pulse width 46 – ns
t
DT2
Send SREQ/ deassertion pulse width 46 – ns
t
DT1
Receive SREQ/ assertion pulse width 40 – ns
t
DT2
Receive SREQ/ deassertion pulse width 40 – ns
t
DT3
Send data setup to SREQ/ transition 20 – ns
t
DT4
Send data hold from SREQ/ transition 20 – ns