Avago Technologies LSI53C1010R - Manual (Page 362)

6-72 Specifications
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Table 6.52 Alphanumeric List by BGA Position
A1 VDD_IO
A2 VDD_IO
A3 B_SD12
−
A4 B_SD12+
A5 VSS_IO
A6 VDD_IO
A7 B_SDP1
−
A8 B_SD0+
A9 VSS_IO
A10 VDD_IO
A11 B_RBIAS
A12 B_SD6
−
A13 VSS_IO
A14 VDD_IO
A15 B_SBSY
−
A16 B_SRST+
A17 VSS_IO
A18 VDD_IO
A19 B_SD8
−
A20 B_SD9+
A21 VSS_IO
A22 VDD_IO
A23 B_SD11+
A24 NC
A25 VSS_IO
A26 VDD_IO
B1 VSS_IO
B2 NC
B3 NC
B4 VSSC
B5 B_SD13+
B6 B_SD14+
B7 B_SD15+
B8 B_SD0
−
B9 B_SD1+
B10 B_SD4
−
B11 B_SD5
−
B12 B_SD6+
B13 B_VDDBIAS
B14 B_SATN
−
B15 B_SBSY+
B16 B_SMSG
−
B17 B_SSEL
−
B18 B_SREQ
−
B19 B_SD8+
B20 B_SD10+
B21 B_SD11
−
B22 B_DIFFSENS
B23 NC
B24 NC
B25 NC
B26 VSS_IO
C1 VDDA
C2 NC
C3 NC
C4 VSS_IO
C5 NC
C6 B_SD13
−
C7 VDD_IO
C8 VSS_IO
C9 B_SD2
−
C10 B_SD4+
C11 VDD_IO
C12 VSS_IO
C13 B_SDP0+
C14 NC
C15 VDD_IO
C16 VSS_IO
C17 B_SSEL+
C18 B_SREQ+
C19 VDD_IO
C20 VSS_IO
C21 VSSC
C22 NC
C23 VDD_IO
C24 NC
C25 NC
C26 VSSC
D1 A_SD11+
D2 VDDC
D3 VDD_IO
D4 NC
D5 NC
D6 VDDC
D7 TEST_HSC
D8 B_SD15
−
D9 B_SD1
−
D10 B_SD3
−
D11 B_SD5+
D12 B_SDP0
−
D13 B_SATN+
D14 B_SACK −
D15 NC
D16 B_SMSG+
D17 B_SCD+
D18 B_SIO+
D19 B_SD10 −
D20 NC
D21 NC
D22 NC
D23 NC
D24 VSS_IO
D25 MAD2
D26 MAD7
E1 VSS_IO
E2 A_DIFFSENS
E3 NC
E4 NC
E5 NC
E6 NC
E7 SCAN_MODE
E8 B_SD14 −
E9 B_SDP1+
E10 B_SD2+
E11 B_SD3+
E12 B_SD7+
E13 B_SD7
−
E14 B_SACK+
E15 B_SRST
−
E16 B_SCD
−
E17 B_SIO
−
E18 B_SD9
−
E19 VDDC
E20 NC
E21 NC
E22 NC
E23 NC
E24 NC
E25 MAD6
E26 VDD_IO
F1 VDD_IO
F2 A_SD11
−
F3 SCLK
F4 NC
F5 NC
F22 NC
F23 MAD1
F24 MAD4
F25 VSSC
F26 VSS_IO
G1 A_SD10+
G2 A_SD10
−
G3 VSS_IO
G4 VSSC
G5 NC
G22 MAD0
G23 MAD3
G24 VDD_IO
G25 MCE/
G26 MOE/
H1 A_SD8
−
H2 A_SD8+
H3 VDD_IO
H4 A_SD9+
H5 VSSA
H22 MAD5
H23 MWE/
H24 VSS_IO
H25 A_GPIO3
H26 A_GPIO0
J1 VSS_IO
J2 A_SREQ
−
J3 A_SREQ+
J4 A_SD9
−
J5 A_SIO+
J22 VDDC
J23 A_GPIO4
J24 MAS1/
J25 A_GPIO1
J26 VDD_IO
K1 VDD_IO
K2 A_SSEL+
K3 A_SCD −
K4 A_SCD+
K5 A_SIO
−
K22 MAS0/
K23 B_GPIO4
K24 A_GPIO2
K25 B_GPIO3
K26 VSS_IO
L1 A_SMSG+
L2 A_SMSG
−
L3 VSS_IO
L4 A_SSEL
−
L5 A_SACK+
L11 VSS_IO
L12 VSS_IO
L13 VSS_IO
L14 VSS_IO
L15 VSS_IO
L16 VSS_IO
L22 VSSC
L23 B_GPIO2
L24 VDD_IO
L25 B_GPIO1
L26 AD34
M1 A_SRST
−
M2 A_SRST+
M3 VDD_IO
M4 A_SATN
−
M5 A_SACK
−
M11 VSS_IO
M12 VSS_IO
M13 VSS_IO
M14 VSS_IO
M15 VSS_IO
M16 VSS_IO
M22 VDDC
M23 NC
M24 VSS_IO
M25 B_GPIO0
M26 AD35
N1 VSS_IO
N2 NC
N3 A_SBSY
−
N4 A_SBSY+
N5 A_SATN+
N11 VSS_IO
N12 VSS_IO
N13 VSS_IO
N14 VSS_IO
N15 VSS_IO
N16 VSS_IO
N22 SCANEN
N23 NC
N24 AD32
N25 AD33
N26 VDD_IO
Signal BGA
Name Pos
Signal BGA
Name Pos
Signal BGA
Name Pos
Signal BGA
Name Pos
Signal BGA
Name Pos