Avago Technologies LSI53C1010R - Manual (Page 102)

3-8 Signal Descriptions
Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
3.3.4 Arbitration Signals
Table 3.5 describes the Arbitration Signals group.
3.3.5 Error Reporting Signals
Table 3.6 describes the Error Reporting Signals group.
STOP/ AB16 S/T/S 8 mA PCI Stop indicates that the selected target is requesting the
master to stop the current transaction.
DEVSEL/ AC16 S/T/S 8 mA PCI Device Select indicates that the driving device has
decoded its address as the target of the current access. As
an input, it indicates to a master whether any device on the
bus has been selected.
IDSEL AC13 I N/A Initialization Device Select is used as a chip select, in
place of the upper 24 address lines, during configuration
read and write transactions.
Table 3.4 Interface Control Signals (Cont.)
Name Bump Type Strength Description
Table 3.5 Arbitration Signals
Name Bump Type Strength Description
REQ/ AD10 O 8 mA PCI Request indicates to the system arbiter that this agent
requests use of the PCI bus. This is a point-to-point signal.
Every master has its own REQ/ signal.
GNT/ AE8 I N/A Grant indicates to a specific agent that access to the PCI bus
has been granted. This is a point-to-point signal. Every
master has its own GNT/ signal.
Table 3.6 Error Reporting Signals
Name Bump Type Strength Description
PERR/ AE17 S/T/S 8 mA PCI Parity Error may be pulsed active by an agent that detects
a data parity error. PERR/ can be used by any agent to
signal data corruption. On detection of a PERR/ pulse, a
nonmaskable interrupt is generated to the host CPU, which
often implies the system is unable to continue operation
when error processing is complete.
SERR/ AC17 O 8 mA PCI System Error is an open drain output that reports address
parity errors as well as critical errors other than parity.