Expansion rom base address (erba) – Avago Technologies LSI53C1010R User Manual
Page 132

4-14
Registers
Version 2.2
Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Registers: 0x30–0x33
Expansion ROM Base Address (ERBA)
Read/Write
This four-byte register handles the base address and size information for
the expansion ROM.
ERBA
Expansion ROM Base Address
[31:11]
Bits [31:11] correspond to the upper 21 bits of the
expansion ROM base address. The host system detects
the size of the external memory by first writing the
Expansion ROM Base Address (ERBA)
register with all
ones and then reading back the register. The SCSI
functions of the LSI53C1010R respond with zeros in all
don’t care locations. The least significant one (1) that
remains represents the binary version of the external
memory size. For example, to indicate an external
memory size of 32 Kbytes, this register, when written with
ones and read back, returns ones in the upper 17 bits.
The size of the external memory is set through MAD[3:1].
Refer to
Section 3.9, “MAD Bus Programming,”
for the
possible size encodings available.
R
Reserved
[10:1]
EREN
Expansion ROM Enable
0
The expansion ROM Enable bit, bit 0, controls whether or
not the device accepts accesses to its expansion ROM.
When the bit is set, address decoding is enabled, and a
device is used with or without an expansion ROM
depending on the system configuration.
Note:
To access the external memory interface, also set the
Memory Space bit in the
register.
31
11 10
1
0
ERBA
R
EREN
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0