Avago Technologies LSI53C1010R - Manual (Page 11)

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Version 2.2 Copyright © 2000–2003 by LSI Logic Corporation. All rights reserved.
Figures
1.1 Typical LSI53C1010R Board Application 1-2
1.2 Typical LSI53C1010R System Application 1-3
2.1 LSI53C1010R Block Diagram 2-2
2.2 DMA FIFO Sections 2-36
2.3 LSI53C1010R Host Interface SCSI Data Paths 2-37
2.4 Regulated Termination for Ultra160 SCSI 2-40
2.5 Determining the Synchronous Transfer Rate 2-45
2.6 Interrupt Routing Hardware Using the LSI53C1010R 2-54
2.7 Block Move and Chained Block Move Instructions 2-55
3.1 LSI53C1010R Functional Signal Grouping 3-3
4.1 Single Transition Transfer Waveforms 4-106
4.2 Double Transition Transfer Waveforms
(XCLKS Examples)
4-107
4.3 Double Transition Transfer Waveforms
(XCLKH Examples)
4-108
5.1 SCRIPTS Overview 5-4
5.2 Block Move Instruction – First Dword 5-5
5.3 Block Move Instruction – Second Dword 5-15
5.4 Block Move Instruction – Third Dword 5-15
5.5 First 32-Bit Word of the I/O Instruction 5-16
5.6 Second 32-Bit Word of the I/O Instruction 5-24
5.7 Read/Write Instruction – First Dword 5-24
5.8 Read/Write Instruction – Second Dword 5-26
5.9 Transfer Control Instructions – First Dword 5-28
5.10 Transfer Control Instructions – Second Dword 5-35
5.11 Transfer Control Instructions – Third Dword 5-35
5.12 Memory Move Instructions – First Dword 5-37
5.13 Memory Move Instructions – Second Dword 5-38
5.14 Memory Move Instructions – Third Dword 5-38
5.15 Load and Store Instruction – First Dword 5-40
5.16 Load and Store Instructions – Second Dword 5-42
6.1 LVD Driver 6-3
6.2 LVD Receiver 6-4
6.3 Rise and Fall Time Test Condition 6-8
6.4 SCSI Input Filtering 6-8
6.5 Hysteresis of SCSI Receivers 6-9