Digi NS9750 - Manual (Page 892)

I n d e x - 22
system control module 253 - 313
Active Interrupt Level Status
register 301
AHB Arbiter Gen Configuration
register 282
bootstrap initialization
272
-
276
BRC channel assignment
283
BRC0, BRC1, BRC2, BRC3 registers 283
bus arbiter configuration
examples 258
bus interconnection 254
Clock Configuration register
293
definition 253
External Interrupt 0-3 Control
register 313
features 254
Gen ID register
311
general purpose timers/counters 263
Int Config registers (0-31) 286
register address mapping 286
interrupt controller 267 - 270
Interrupt Status Active register
289
Interrupt Status Raw register
290
Interrupt Vector Address Register
Level 0-31 285
ISRADDR register 288
Miscellaneous System Configuration
and Status register 296
PLL configuration 271
PLL Configuration register 299
programmable timers 263 - 264
register addresses
276
Reset and Sleep Control register
295
Software Watchdog Configuration
register 291
software watchdog timer 263
Software Watchdog Timer register
293
SPLIT transfers
258
system address map 261
system attributes 271 - 276
system bus arbiter
254
-
260
high-speed peripheral
subsystem 255
system configuration registers 276 -
313
System Memory Chip Select 0 Dynamic
Memory Base and Mask
registers
303
System Memory Chip Select 0 Static
Memory Base and Mask
registers
307
System Memory Chip Select 1 Dynamic
Memory Base and Mask
registers
304
System Memory Chip Select 1 Static
Memory Base and Mask
registers
308
System Memory Chip Select 2 Dynamic
Memory Base and Mask
registers
305
System Memory Chip Select 2 Static
Memory Base and Mask
registers
309
System Memory Chip Select 3 Dynamic
Memory Base and Mask
registers
306
System Memory Chip Select 3 Static
Memory Base and Mask
registers
310
Timer 0-15 Control registers
301
Timer 0-15 Read register 285
Timer 0-15 Reload Count registers 284
Timer Interrupt Status register 291
vectored interrupt controller 270
system control module bootstrap
configuration pins 273
system control processor (CP15)
registers 51 - 77
accessing
52
ARM926EJ-S system addresses 51