Digi NS9750 - Manual (Page 599)

w w w . d i g i e m b e d d e d . c o m 5 7 5
L C D C o n t r o l l e r
Generating interrupts
The LCD controller has three individually masked interrupts and a single combined
interrupt. The single combined interrupt is asserted if any of the combined interrupts
are asserted and unmasked.
External pad interface signals
The external pad interface signals are brought out through GPIO.
LCD panel signal multiplexing details
The
CLLP
,
CLAC
,
CLFP
, and
CLLE
signals are common, but the
CLD[23:0]
bus has eight
modes of operation:
TFT 24-bit interface
TFT 18-bit interface
Color STN single panel
Color STN dual panel
4-bit mono STN single panel
4-bit mono STN dual panel
8-bit mono STN single panel
8-bit mono STN dual panel
Signal name Type Description
CLPOWER Output LCD panel power enable
CLLP Output Line synchronization pulse (STN)/horizontal synchronization pulse
(TFT)
CLCP Output LCD panel clock
CLFP Output Frame pulse (STN)/vertical synchronization pulse (TFT)
CLAC Output STN AC bias drive or TFT data enable output
CLD[23:0] Output LCD panel data
CLLE Output Line end signal
Table 345: External pad interface signals