Digi NS9750 - Manual (Page 882)

I n d e x - 12
color STN panels 562
features
4
,
560
-
564
functional overview
564
-
567
interrupts 598 - 599
master bus error interrupt 598
next base update interrupt 599
vertical compare interrupt 598
LCD panel resolution
561
LCD timing diagrams 822 - 826
LCDControl register 590
LCDInterrupt register 594
LCDINTRENABLE register 589
LCDLPBASE register
587
LCDLPCURR register
594
LCDPalette register 595
LCDStatus register 593
LCDTiming0 register 580
LCDTiming1 register 582
LCDTiming2 register 583
LCDTiming3 register
587
LCDUPBASE register 587
LCDUPCURR register 594
mono STN panels 563
number of colors 562
panel support
561
power up/power down sequence 563
programmable parameters 560
register addresses 579
registers 579 - 597
signals and interrupts
566
individual interrupts
566
programmable control signals 566
single combined interrupt 566
supported display types 564
TFT panels 562
LCD input clock
565
LCD module signals
42
LCD panel resolution 561
LCD panel signal multiplexing details 575
LCD panel support
561
LCD timing
822
-
826
LCDControl register 590
LCDInterrupt register 594
LCDINTRENABLE register 589
LCDLPBASE register 587
LCDLPCURR register
594
LCDPalette register 595
big endian configuration 596
little endian configuration 596
LCDStatus register 593
LCDTiming0 register
580
horizontral timing restriction
581
LCDTiming1 register 582
LCDTiming2 register 583
LCDTiming3 register 587
LCDUPBASE register 587
LCDUPCURR register 594
locked bus sequence
257
locked interrupt driven mode 546
low-power operation 118
low-power SDRAM partial array
refresh
118
M
MAC Configuration Register #1 348
MAC Configuration Register #2 351
main arbiter, high speed 256
Master Address register 550
master bus error interrupt
(MBERRORINTR) 598
Master Enable register 697
master module commands, I2C 546
Master Reset register 523
master reset. See reset function .
Maximum Frame register 357