Digi NS9750 User Manual
Page 464
P C I b u s a r b i t e r
4 4 0
N S 9 7 5 0 H a r d w a r e R e f e r e n c e
Register bit assignment
PCI Bridge PCI to AHB Memory Address Translate 1
Address: A030 0044
The PCI Bridge PCI-to-AHB Memory Translate 1 register translates the PCI memory
addresses to the appropriate AHB memory addresses.
Register bit assignment
Bits
Access
Mnemonic
Reset
Description
D31:30
Hardwired to
0
Reserved
N/A
N/A
D29:20
R/W
MALT3VAL
0x000
Bits [31:22] of AHB address if PCI address matches
BAR3.
D19:12
R/W
MALT2VAL
0x00
Bits [31:24] of AHB address if PCI address matches
BAR2.
D11:10
Hardwired to
0
Reserved
N/A
N/A
D09:04
R/W
MALT1VAL
0x00
Bits [31:26] of AHB address if PCI address matches
on BAR1.
D03:00
R/W
MALT0VAL
0x0
Bits [31:28] of AHB address if PCI address matches
BAR0.
Table 276: PCI Bridge PCI-to-AHB Memory Address Translate 0 register
Bits
Access
Mnemonic
Reset
Description
D31:26
Hardwired to
0
Reserved
N/A
N/A
Table 277: PCI Bridge PCI-to-AHB Memory Address Translate 1 register
Reserved
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
MALT5VAL
MALT4VAL
MALT5VAL
s