Digi NS9750 User Manual
Page 208
D y n a m i c m e m o r y c o n t r o l l e r
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Table 115 shows the outputs from the memory controller and the corresponding
inputs to the 512M SDRAM (32Mx16, pins 13 and 14 used as bank selects).
Table 116 shows the outputs from the memory controller and the corresponding
inputs to the 512M SDRAM (64Mx8, pins 13 and 14 used as bank selects).
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
14
BA1
25
25
13
BA0
26
26
12
12
24
-
11
11
23
-
10
10/AP
22
AP
9
9
21
11
8
8
20
10
7
7
19
9
6
6
18
8
5
5
17
7
4
4
16
6
3
3
15
5
2
2
14
4
1
1
13
3
0
0
12
2
Table 115: Address mapping for 512M SDRAM (32Mx16, BRC)
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
14
BA1
27
27
13
BA0
26
26
12
12
25
-
Table 116: Address mapping for 512M SDRAM (64x8, BRC)