Digi NS9750 User Manual
Page 205
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M e m o r y C o n t r o l l e r
Table 112 shows the outputs from the memory controller and the corresponding
inputs to the 256M SDRAM (8Mx32, pins 13 and 14 used as bank selects.
11
11
23
-
10
10/AP
22
AP
9
9
21
11
8
8
20
10
7
7
19
9
6
6
18
8
5
5
17
7
4
4
16
6
3
3
15
5
2
2
14
4
1
1
13
3
0
0
12
2
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
14
BA1
23
23
13
BA0
24
24
12
12
22
-
11
11
21
-
10
10/AP
20
AP
9
9
19
-
8
8
18
-
7
7
17
9
Table 112: Address mapping for 256M SDRAM (8Mx32, BRC)
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
Table 111: Address mapping for 128M SDRAM (16Mx8, BRC)