Tx error buffer descriptor pointer register, Register bit assignment – Digi NS9750 User Manual
Page 414
E t h e r n e t C o n t r o l a n d S t a t u s r e g i s t e r s
3 9 0
N S 9 7 5 0 H a r d w a r e R e f e r e n c e
Register bit assignment
TX Error Buffer Descriptor Pointer register
Address: A060 0A20
Register bit assignment
Bits
Access
Mnemonic
Reset
Description
D31:08
N/A
Reserved
N/A
N/A
D07:00
R/W
TXRPTR
0x00
Contains a pointer to a buffer descriptor in the TX buffer
descriptor RAM.
Note:
This pointer is the 8-bit physical address of the
TX buffer descriptor RAM, and points to the
first location of the four-location buffer
descriptor. The byte offset of this buffer
descriptor can be calculated by multiplying this
value by 4.
This is the buffer descriptor at which the
TX_WR
logic
resumes processing when TCLER is toggled from low to
high in Ethernet General Control Register #2 (see
page 342).
Table 243: Transmit Recover Buffer Descriptor Pointer register
Bits
Access
Mnemonic
Reset
Description
D31:08
N/A
Reserved
N/A
N/A
Table 244: TX Error Buffer Descriptor Pointer register
Reserved
TXERBD
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
Reserved