Port status register, peripheral, Feature control register a, Table 402: pin — port status register, peripheral – Digi NS9750 User Manual
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Port Status register, peripheral
Address: 9040 010C
Feature Control Register A
Address: 9040 0114
Feature Control Register A enables buffer trigger levels for printer port operations.
Bits
Access
Mnemonic
Reset
Description
D31:08
R
Reserved
0x0
N/A
D07
R
BUSY
0x0
Allows the CPU to read the status of the peripheral control
pins directly.
The meaning of each bit varies, depending on whether the
mode is compatibility, nibble, byte, or ECP.
D06
R
N_ACK
0x0
D05
R
PERR
0x0
D04
R
SEL
0x0
D03
R
N_FLT
0x0
D02:00
R
Reserved
0x0
N/A
Table 402: pin — Port Status register, peripheral
BUSY N_ACK PERR
SEL
N_FLT
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
Reserved
Reserved
Reserved
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
Reserved
Reserved
PPtEn