Wtrd = from 1 to 15, If the pb field is set to 1, all four, Signal will always be high – Digi NS9750 User Manual

Page 831: Woen = from 0 to 15

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T i m i n g

Static RAM read cycle with configurable wait states

Figure 115: Static RAM read cycle with configurable wait states

WTRD = from 1 to 15

WOEN = from 0 to 15

If the PB field is set to 1, all four

byte_lane

signals will go low for 32-bit,

16-bit, and 8-bit read cycles.

If the PB field is set to 0, the

byte_lane

signal will always be high.

M24

M23

M28

M27

M20

M19

M18

M17

M26

M25

Note-1

CPU clock / 2

data<31:0>

addr<27:0>

st_cs_n<3:0>

oe_n

byte_lane<3:0>