Digi NS9750 - Manual (Page 514)

B B u s B r i d g e C o n t r o l a n d S t a t u s r e g i s t e r s
4 9 0 N S 9 7 5 0 H a r d w a r e R e f e r e n c e
BBus Bridge Control and Status registers
The BBus configuration registers are located at base address
0xA040.0000
. All
configuration registers are accessed with zero wait states. Table 295 lists the
configuration and status registers in the BBus Bridge module. All configuration
registers must be accessed as 32-bit words and as single accesses only. Bursting is not
allowed.
Address Register
A040 0000 DMA Channel 1 Buffer Descriptor Pointer
A040 0004 DMA Channel 1 Control register
A040 0008 DMA Channel 1 Status and Interrupt Enable
A040 000C DMA Channel 1 Peripheral Chip Select
A040 0020 DMA Channel 2 Buffer Descriptor Pointer
A040 0024 DMA Channel 2 Control register
A040 0028 DMA Channel 2 Status and Interrupt Enable
A040 002C DMA Channel 2 Peripheral Chip Select
A040 0100 BBus Bridge Interrupt Status
A040 1004 BBus Bridge Interrupt Enable
Table 295: BBus Bridge module registers