Digi NS9750 - Manual (Page 877)

I - I n d e x - 7
register 354
Collision Window/Retry register
355
control and status registers
337
-
396
definition 315
diagram 316
Ethernet front-end (EFE) module. See
also Ethernet front-end
module. 323-333
Ethernet front-end features 316
Ethernet front-end module 315
Ethernet General Control Register
#1
339
Ethernet General Control Register
#2 342
Ethernet General Status register 344
Ethernet Interrupt Enable register 387
Ethernet Interrupt Status register
385
Ethernet MAC 317 - 322
Ethernet MAC features 316
Ethernet Receive Status register 347
Ethernet timing diagrams 813 - 815
Ethernet Transmit Status register
344
external CAM filtering
334
-
336
General Statistics registers 377
Carry Register 1 378
Carry Register 1 Mask register 380
Carry Register 2 379
Carry Register 2 Mask register
382
MAC Configuration Register #1
348
MAC Configuration Register #2 351
Maximum Frame register 357
MII Management Address register 361
MII Management Command
register 360
MII Management Configuration
register 359
MII Management Indicators
register
363
MII Management Read Data
register 363
MII Management Write Data
register 362
Non Back-to-Back Inter-Packet Gap
register 355
PHY Support register
358
register addresses
337
register hash tables 366
RX A Buffer Descriptor Pointer Offset
register 391
RX A Buffer Descriptor Pointer
register 383
RX B Buffer Descriptor Offset
register 392
RX B Buffer Descriptor Pointer
register
383
RX C Buffer Descriptor Pointer Offset
register 393
RX C Buffer Descriptor Pointer
register
384
RX D Buffer Descriptor Pointer Offset
register 393
RX D Buffer Descriptor Pointer
register
384
RX Free Buffer register 395
sample hash table code 397 - 401
Station Address Filter register 366
Station Address registers 364
Statistics registers 368
combined transmit and receive
statistics counters 368
receive statistics counters 369
transmit statistics counters 373
Transmit Buffer Descriptor Pointer
Offset register 394
Transmit Recover Buffer Descriptor
Pointer register 389
TX Buffer Descriptor Pointer
register
389
TX buffer descriptor RAM 396