Digi NS9750 - Manual (Page 701)

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I E E E 1 2 8 4 P e r i p h e r a l C o n t r o l l e r
The NS9750 directly supports RLE compression. The device ID can be returned in any
supported reverse channel mode. The device ID is a length field followed by a string
of ASCII characters that define the peripheral’s characters and/or capabilities.
BBus slave and DMA interface
The BBus slave and DMA interface module controls accesses from the BBus to the IEEE
peripheral. The interface can operate in two modes: DMA and CPU.
In DMA mode, three BBus DMA channels are used for forward data and
forward command traffic, and all reverse traffic.
In CPU mode, the CPU can access the forward data, forward command, and
reverse FIFOs directly.
BBus slave and DMA interface register map
The IEEE 1284 module uses the control and status registers listed in Table 390.
All configuration registers must be accessed as 32-bit words and as single accesses
only. Bursting is not allowed.
0011 0100 Request device ID using ECP mode
with RLE Receive device ID with ECP data
compression.
0000 0010 Reserved Reserved
0000 0001 Byte mode reverse channel transfer
0000 0000 Nibble mode reverse channel transfer
Extensibility byte Definition Description
Table 389: Extensibility byte values
Address Register Description
9040 0000 GenConfig General Configuration register
9040 0004 InterruptStatusandControl Interrupt Status and Control register
Table 390: 1284 Control and Status registers