Lcdinterrupt register, Lcdupcurr and lcdlpcurr, Table 360: lcdinterrupt register – Digi NS9750 User Manual
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R e g i s t e r s
5 9 4
N S 9 7 5 0 H a r d w a r e R e f e r e n c e
LCDInterrupt register
Address: A080 0024
The LCDInterrupt register is a bit-by-bit logical AND of the LCDStatus register and the
LCDINTRENABLE register. Interrupt lines correspond to each interrupt. A logical OR of
all interrupts is provided to the system interrupt controller.
Register bit assignment
LCDUPCURR and LCDLPCURR
Address: A080 0028 and A080 002C
The LCDUPCURR and LCDLPCURR registers contain an approximate value of the upper
and lower panel data DMA addresses when read. The registers can change at any
time, and therefore can be used only as a mechanism for coarse delay.
Bits
Access
Mnemonic
Reset
Description
D31:05
N/A
Reserved
N/A
N/A
D04
R
MBERRORINTR
0x0
AHB master bus error interrupt status bit.
D03
R
VCOMPINTR
0x0
Vertical compare interrupt status bit.
D02
R
LNBUINTR
0x0
LCD next base address update interrupt status
bit.
D01:00
N/A
Reserved
N/A
N/A
Table 360: LCDInterrupt register
MB
ERROR
INTR
VCOMP
INTR
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
Reserved
Reserved
Reserved
LNBU
INTR