Pci clocks of, Being negated. this is the time allowed from, Pci configuration 1 register – Digi NS9750 User Manual

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P C I - t o - A H B B r i d g e

Change these fields only during system initialization, when there is no PCI activity. In
a system where NS9750 is not the host, these fields must be programmed within 2

PCI clocks of

RST#

being negated. This is the time allowed from

RST#

negated to the

first configuration cycle on the PCI bus.

Register bit assignment

PCI Configuration 1 register

Address: A030 0014

The PCI Configuration 1 register contains the values that will be read from the PCI
Class Code and PCI Revision ID registers.

Change these fields only during system initialization, when there is no PCI activity. In
a system where NS9750 is not the host, these fields must be programmed within 2

PCI clocks of

RST#

being negated. This is the time allowed from

RST#

negated to the

first configuration cycle on the PCI bus.

Bits

Access

Mnemonic

Reset

Description

D31:16

R/W

DEVICE_ID

0x00C4

Device ID value

Value to be inserted into the PCI Device ID register.
Defaults to the assigned device ID (0x00C4).

D15:00

R/W

VENDOR_ID

0x114F

Vendor ID value

Value to be inserted into the PCI Vendor ID
register. Defaults to the assigned vendor ID
(0x114F).

Table 264: PCI Configuration 0 register

DEVICE_ID

VENDOR_ID