Digi NS9750 - Manual (Page 873)

I - I n d e x - 3
BBus peripheral address map 473
BBus slave and DMA interface
module 677 - 705
CPU mode 677
DMA mode 677
register map 677
BBus subsystem
501
BBus utility 521 - 542
ARM Wake-up register 541
BBus DMA Interrupt Enable
register 537
BBus DMA Interrupt Status register
536
BBus Monitor register
535
Endian Configuration register 539
GPIO Configuration register
options 528
GPIO Configuration registers
524
-
529
GPIO Control registers
529
-
532
GPIO Status registers 532 - 535
Master Reset register 523
register addresses 522
USB Configuration register 538
BGA layout
844
bist_en_n truth/termination table 28
bit-rate examples 628 - 629
bit-rate generator 603 , 645
clock sources 604 , 645
bootstrap initialization 272 - 276
configuration pins
273
BRC channel assignment 283
BRC0, BRC1, BRC2, BRC3 registers 283
BRF field 256
Bridge Configuration registers 413 - 418
Buffer Descriptor Pointer register
491
Buffer Full Status register
703
buffer length 475 , 505
buffer length bit, Ethernet 327
buffer length, Ethernet 328
buffer pointer, Ethernet 326 , 328
bus arbitration
I2C
547
bus interconnection, system control
module 254
bus turnaround 143 - 148
byte lane control
149
byte lane control and databus
steering 162
little and big endian, address not right-
justified 161
little and big endian, address right-
justified 154
byte mode 672
data transfer cycle 672
C
caches and write buffer
105
-
111
cache features 105
cache MVA and set/way formats 109
enabling the caches 107
write buffer 106
CAM controller
334
CardBus adapter requirements
464
CardBus Miscellaneous Support
register 442
CardBus port 3
CardBus signals
463
CardBus Socket Control register
454
CardBus Socket Event register 446
CardBus Socket Force Event register 451
CardBus Socket Mask register 447
CardBus Socket Present State register 448
CardBus support
461
-
465
Carry Register 1
378
Carry Register 1 Mask register 380
Carry Register 2 379