Digi NS9750 User Manual
Page 199
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M e m o r y C o n t r o l l e r
32-bit wide databus address mappings (BRC)
Table 104 through Table 116 show 32-bit wide databus address mappings for several
SDRAM (BRC) devices.
Table 104 shows the outputs from the memory controller and the corresponding
inputs to the 16M SDRAM (1x16, pin 14 used as bank select).
1
1
16
3
0
0
15
2
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
14
BA
21
21
13
-
-
-
12
-
-
-
11
-
-
-
10
10/AP
20
AP
9
9
19
-
8
8
18
-
7
7
17
9
6
6
16
8
5
5
15
7
4
4
14
6
3
3
13
5
2
2
12
4
1
1
11
3
0
0
10
2
Table 104: Address mapping for 16M SDRAM (1Mx16, BRC)
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
Table 103: Address mapping for 512M SDRAM (64Mx8, RBC)