Digi NS9750 User Manual
Page 204
D y n a m i c m e m o r y c o n t r o l l e r
1 8 0
N S 9 7 5 0 H a r d w a r e R e f e r e n c e
Table 110 shows the outputs from the memory controller and the corresponding
inputs to the 128M SDRAM (8Mx16, pins 13 and 14 used as bank selects).
Table 111 shows the outputs from the memory controller and the corresponding
inputs to the 128M SDRAM (16Mx8, pins 13 and 14 used as bank selects).
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
14
BA1
23
23
13
BA0
24
24
12
-
-
-
11
11
22
-
10
10/AP
21
AP
9
9
20
-
8
8
19
10
7
7
18
9
6
6
17
8
5
5
16
7
4
4
15
6
3
3
14
5
2
2
13
4
1
1
12
3
0
0
11
2
Table 110: Address mapping for 128M SDRAM (8Mx16, BRC)
Output address
(
ADDROUT
)
Memory device
connections
AHB address to row
address
AHB address to
column address
14
BA1
25
25
13
BA0
24
24
12
12
-
-
Table 111: Address mapping for 128M SDRAM (16Mx8, BRC)