Digi NS9750 User Manual

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M e m o r y C o n t r o l l e r

Dynamic Memory Active to Active Command Period register

Address: A070 0048
The Dynamic Memory Active to Active Command Period register allows you to
program the active to active command period, t

. It is recommended that this

register be modified during system initialization, or when there are no current or
outstanding transactions. Wait until the memory controller is idle, then enter low-
power or disabled mode. This value normally is found in SDRAM datasheets as t

Note:

The Dynamic Memory Active to Active Command period register is used
for all four dynamic memory chip selects. The worst case value for all
chip selects must be programmed.

Register bit assignment

Bits

Access

Mnemonic

Description

D31:05

N/A

Reserved

N/A (do not modify)

D04:00

R/W

Active to active command period (t

)

0x0–0x1E

n+1 clock cycles, where the delay is in

CLK

cycles.

0x1F

32 clock cycles (reset value on

reset_n

)

Table 150: Dynamic Memory Active to Active Command Period register

Reserved