Freescale Semiconductor StarCore SC140 - Manual (Page 83)

Address Generation Unit
SC140 DSP Core Reference Manual 2-51
2.3.6.1.1 Example of Normal Usage of the Semaphoring Mechanism
The following sequence accesses a resource controlled by a semaphore.
label : BMTSET.W #mask,(R0)
JT label
Normally, the mask enables only one bit. In this case, the memory destination pointed to by (R0) is read,
and the enabled bit is tested. The enabled bit is then set, and the memory destination is written back.
The T bit is set if the enabled bit was originally 1 (meaning that it was semaphore-occupied), or that the
write-back failed. A T bit value of TRUE indicates to the conditional jump that the attempt to obtain the
resource has failed, and that the jump should be taken. The T bit is cleared if the enabled bit was originally
zero. This means that the semaphore was not allocated. Therefore, the resource was available, and the
instruction was successful in setting the semaphore exclusively. A successful allocation writeback results.
When the destination is a register, the write is always successful.
2.3.6.2 Semaphore Hardware Implementation
During the address phase of the read and write accesses associated with the BMTSET instruction, an
output of the core is asserted. This assertion indicates that the read and the following write are part of a
read-modify-write sequence.
During the data phase of the write access, a core input provides the core with the result of the access
(de-asserted = write failed).
2.3.7 Move Instructions
The SC140 instruction set supports various types of move instructions which differ in the following
properties:
• Access width — Byte (8 bits), word (16 bits), long-word (32 bits), and two long words (64 bits)
• Data type — Signed integer, unsigned integer, fractional (with or without limiting)
• Multi-register moves — Some move operations split data between two or four registers
• Addressing mode — For example, absolute, relative to an address pointer (with various offset and
post-update options), and relative to the stack pointer
The move instructions perform data movement over the XDBA and XDBB buses (for data moves). Move
instructions do not affect the status register with the exception of the sticky scaling bit in reading a DALU
register.
Table 2-25 lists the move instructions. The suffix just before the period in the MOVE nomenclature
indicates the following:
• None = Signed
• U = Unsigned
• S = Scaling and limiting (saturation) enabled