Freescale Semiconductor StarCore SC140 - Manual (Page 266)

7-16 SC140 DSP Core Reference Manual
Static Programming Rules
7.5.4 AGU Rules
Rule A.1
At least two cycles are required between when an instruction writes the MCTL register and when an AGU
instruction reads the R0-R7 registers with an address register update or address pre-calculation, or as an
operand affected by a MCTL modifier field. This rule does not apply to R8-R15, or to R0-R7 using the no
update (Rn) addressing mode.
Example 7-25. MCTL Write to R0-R7 Use
move.l #$12345678,mctl ;change MCTL
move.w (r0)+,d0 ;use MCTL, not allowed
move.l #$12345678,mctl ;change MCTL
nop
move.w (r0)+,d0
;use MCTL, not allowed
move.l #$12345678,mctl ;change MCTL
nop
nop
move.w (r0)+,d0
;use MCTL, allowed
move.l d0,mctl ;change MCTL
adda r0,r1 ;use MCTL, not allowed
move.l d0,mctl ;change MCTL
move.w d1,(r0+n0) ;use MCTL, not allowed
bmclr #0,mctl.l ;change MCTL
move.w (r0)+,d0 ;use MCTL, not allowed
bmclr #0,mctl.l ;change MCTL
move.w (r1)+,d0 ;use MCTL, not allowed
bmclr #0,mctl.l ;change MCTL
move.w (r5)+,d0 ;use MCTL, not allowed
move.l d0,mctl ;change MCTL
adda r8,r1 ;use MCTL, not allowed
move.l d0,mctl ;change MCTL
adda r1,r8 ;no modifier mode, allowed
move.l d0,mctl ;change MCTL
adda #$1234,r8,r1 ;use MCTL, allowed
move.l d0,mctl ;change MCTL
adda #$1234,r1,r8 ;no modifier mode, not allowed
move.l d0,mctl ;change MCTL
move.w (r0),d0 ;no update mode, allowed
move.l d0,mctl ;change MCTL
move.w (r8)+,d0 ;no modifier mode, allowed