Bmtset, Bit-masked test and set a, Bit operand (bmu) description – Freescale Semiconductor StarCore SC140 User Manual
Page 398: Status and conditions that affect instruction, Operation assembler syntax

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SC140 DSP Core Reference Manual
BMTSET
BMTSET
Bit-Masked Test and Set a
BMTSET
16-Bit Operand (BMU)
Description
These operations use an unsigned 16-bit immediate data mask to test and set selected bits in the destination
operand. For each bit i that is set (selected) in the mask, the bit i in the corresponding destination operand’s
bit position is set. Unselected bits are unaffected. If all selected bits were set when the data was read, the T
bit is set. If at least one of the selected bits was not set, the T bit is cleared. This operation reads from a
register, modifies the retrieved value, and writes the new value back to that register.
Status and Conditions that Affect Instruction
None.
Status and Conditions Changed by Instruction
Example 1
bmtset #$111f,d1.l
Operation
Assembler Syntax
1
→ DR.H
i
(i denotes bits=1 in #u16)
if (all selected bits were set), then 1
→ T, else 0 → T
BMTSET #u16,DR.H {0
≤ u16 < 2
16
}
1
→ DR.L
i
(selected bits)
if (all selected bits were set), then 1
→ T, else 0 → T
BMTSET #u16,DR.L {0
≤ u16 < 2
16
}
BMTSET #u16,DR.H
Tests and sets selected bits in the HP contents of a data or address register (DR).
BMTSET #u16,DR.L
Tests and sets selected bits in the LP contents of a data or address register (DR).
Register Address
Bit Name
Description
SR[1]
T
Set if all the bits selected by the mask were set, cleared otherwise.
Ln
L
Clears the Ln bit in the destination data register.
Register/Memory Address
Before
After
SR
$00E4 0000
$00E4 0000
immediate
$111F
d1
$00 1234 5678
$00 1234 577F