Freescale Semiconductor StarCore SC140 - Manual (Page 170)

4-60 SC140 DSP Core Reference Manual
Event Detection Unit (EDU) Channels and Registers
EDCDEN
Bits 6–3 EDCD Enable — Used to enable or
disable the EDCD. When enabled,
EDCD continues to operate until it is
explicitly disabled by writing 0000 into
EDCDEN bits, or when EDCDEN bits
are changed for another enabling
condition. The channel remains disabled
until a new enabling condition occurs.
When the EDCDEN bits are set to
enable the operation of the EDCD upon
event occurrence, the EOnCE
overwrites these bits to 1111 one clock
cycle after the appearance of the event.
The latency for enabling the channel is
one cycle.
0000 = . EDCD is disabled.
0001 = EDCD is disabled, but is . enabled when an event is
detected by EDCA0.
0010 = EDCD is disabled, but is . enabled when an event is
detected by EDCA1.
0011 = . EDCD is disabled, but is . enabled when an event is
detected by EDCA2.
0100 = . EDCD is disabled, but is enabled when an event is
detected by EDCA3.
0101 = . EDCD is disabled, but is . enabled when an event is
detected by EDCA4.
0110 = . EDCD is disabled, but is . enabled when an event is
detected by EDCA5.
0111 = . EDCD is disabled, but is enabled when an event is
detected by the optional external EDCA6.
1000 = . EDCD is disabled, but is enabled when an event is
detected by the optional external EDCA7.
1001 = . EDCD is disabled, but is enabled when a count event
is . detected.
1010 = EDCD is disabled, but is enabled when EED is
asserted and EED is programmed as input in the
EE_CTRL register.
1011 = EDCD is enabled but will be disabled when EED is
negated, in both cases EED is programmed as an input
in the EE_CTRL register. This state can only be reached
by previously being in the 1010 state and asserting the
EED pin.
1100 = Reserved
1101 = Reserved
1110 = Reserved
1111 = EDCD is enabled.
CCS
Bits 2–1 Comparator Condition Selection —
These bits select one of these four
results from the comparator:
• Equal to
• Not equal to
• Greater than
• Less than
00 = Equal to EDCD_REF
01 = Not equal to EDCD_REF
10 = Greater than EDCD_REF
11 = Less than EDCD_REF
In case of multi-operand data accesses (such as MOVE.2W
etc.) the compare result will be true if the condition is fulfilled
for any of the individual operands (one byte, word etc.).
However for the “not equal” condition – all operands must
be not equal in order for the condition to be fulfilled.
ATS
Bit 0 Access Type Selection — The ATS bit
determines whether the memory access
is read or write. 0 = Read
1 = Write
Table 4-20. EDCD_CTRL Description (Continued)
Name Description Settings