Freescale Semiconductor StarCore SC140 - Manual (Page 305)

LPMARK Rules
SC140 DSP Core Reference Manual 7-55
LPMARK Rule L.L.6
A MOVE-like instruction that writes the SR register is not allowed at LPA-2, LPA-1, LPB-2 or LPB-1 of a
short loop.
7.8.3.4 Loop Sequencing Rules
LPMARK Rule L.D.2 + L.D.3
The minimum number of VLES between the following instructions that write the active LCn register and
LPA or LPB of a loop is:
• DOENn/DOENSHn Rn or #x: one VLES (address register or immediate value)
• DOENn/DOENSHn Dn: two VLES (data register)
• MOVE-like instruction that writes the active LCn register: two VLES
Example 7-95. Active LCn Write at the Start of a Loop
move.w #3,d0
doensh0 d0
;allowed
move.l d1,lc0 ;not allowed
move.w #2,d2
inc d1 {lpmarka set}
move.w #3,r8
dosetup1 label1
doen1 r8
;not allowed
label1 inc d3 {lpmarkb set}
inc d4
inc d5
LPMARK Rule L.D.6
At least one VLES is required between an instruction that writes the active SAn register and LPA or LPB
of a long loop.
Example 7-96. Active SAn Write at the End of Long Loops
doen0 #5
dosetup0 label
;not allowed
label inc d2 {lpmarkb set}
inc d1
inc d0
LPMARK Rule L.D.8 + L.D.9
At least one VLES is required between a MOVE-like instruction that reads the active LCn register and
LPA or LPB of a loop.