Freescale Semiconductor StarCore SC140 - Manual (Page 126)

4-16 SC140 DSP Core Reference Manual
EOnCE Enabling and Power Considerations
4.4 EOnCE Enabling and Power Considerations
Except for the EOnCE controller, modules are disabled until one of the following occurs:
• Write access is made to one of the EOnCE registers by the core software.
• Execution of either ENABLE_EONCE or DEBUG_REQUEST instructions by the host
These events enable all the EOnCE modules, which will result in increased power consumption.
4.5 EOnCE Module Internal Architecture
The EOnCE module is composed of five main sub-units, which performs the following main tasks:
• EOnCE Controller: Controls the overall behavior of the EOnCE and allows the JTAG port and core
software to read and write the EOnCE registers
• Event Counter: Counts various events
• Event Detection Unit (EDU): Generates events when it detects predefined values on
— the data-memory address buses
— the program counter
— the data-memory data buses
• Event Selector: Controls what action is taken when events or a combination of simultaneous events
occurs
• Trace Unit: Performs non-intrusive program tracing during program execution
The various EOnCE units include a number of registers. The units, the tasks they perform, and the
corresponding registers are described in the sections that follow.
4.5.1 EOnCE Controller
The EOnCE controller performs the following functions:
• Reading and writing EOnCE registers through JTAG
Clock + - - - - -
Trace Transaction + - - - - -
EC + - - - - -
MARK - + - - - -
COF - + - - - -
Table 4-5. EOnCE Event and Action Summary
Event type Counted
trace
trigger
Debug
state
Debug
exception
Enable
tracing Disable
tracing
Other actions