Freescale Semiconductor StarCore SC140 - Manual (Page 656)

A-342 SC140 DSP Core Reference Manual
OR
OR
Bitwise OR on a 16-Bit Operand (BMU)
OR
Description
Status and Conditions that Affect Instruction
None.
Status and Conditions Changed by Instruction
Example
or #$0f0a,d0.l
0000 1111 0000 1010
or 1111 0000 0110 0101
1111 1111 0110 1111
Operation Assembler Syntax
#u16
⏐ DR.L → DR.L
OR #u16,DR.L {0
≤ u16 < 2
16 }
#u16
⏐ DR.H → DR.H
OR #u16,DR.H {0
≤ u16 < 2
16 }
OR #u16,DR.L
Performs a bitwise inclusive OR of an immediate value with the LP of a data or address register (DR). It
then stores the result in the LP of the destination data or address register (DR). The other register bits are
not affected. This instruction is assembler-mapped to BMSET #u16,DR.L with the immediate value.
OR #u16,DR.H
Performs a bitwise inclusive OR of an immediate value with the HP of a data or address register (DR). It
then stores the result in the HP of the destination data or address register (DR). The other register bits are
not affected. This instruction is assembler-mapped to BMSET #u16,DR.H with the immediate value.
Register Address Bit Name Description
Ln L Clears the Ln bit in the destination registers.
Register/Memory Address Before After
Immediate $0F0A
D0 $1:$00 ACBD F065 $0:$00 ACBD FF6F