Freescale Semiconductor StarCore SC140 - Manual (Page 427)

CLB
SC140 DSP Core Reference Manual A-113
C-D
CLB
Count Leading Bits (DALU)
CLB
Description
Status and Conditions that Affect Instruction
None.
Status and Conditions Changed by Instruction
Example
clb d3,d7
The number of consecutive zeros is 20, 9 - 20 = -11 ($FFF5)
Operation Assembler Syntax
If Da[39] == 0,
then 9 – (number of consecutive leading zeros in Da[39:0])
→ Dn
else 9 – (number of consecutive leading ones in Da[39:0])
→ Dn
CLB Da,Dn
CLB Da,Dn
Counts the leading 0s or 1s according to bit 39 of source Da. It scans bits [39:0] of Da starting from bit 39.
The operation loads nine minus the number of consecutive leading 0s or 1s into destination Dn. The result
is sign-extended. The range of the result is +8 to –31. This instruction can be used in conjunction with the
instruction ASRR for performing fast normalization of the operand. If Da equals zero, then Dn is set to
zero.
Register Address Bit Name Description
Ln L Clear the Ln bit in the destination data register.
Register/Memory Address Before After
D3 $00000 F7434
L7:D7 $0:$FF FFFF FFF5