Isap instructions in same ifc group -15, Also rule g.p.9), To rule g.p.9, it – Freescale Semiconductor StarCore SC140 User Manual
Page 265: Rule g.p.8, Rule g.p.9
Static Programming Rules
SC140 DSP Core Reference Manual
7-15
Rule G.P.8
It is not allowed to group AGU instructions that use or update a data register (D0-D15) in the same VLES
with an ISAP instruction.
This rule relates to independent AGU instructions, not to instructions that are implicitly generated by the
assembler from ISAP instructions to support ISAP memory accesses and register transfers. For more
details on how this works, see
Section 6.4, “ISAP Memory Access,”
Example 7-23. Core AGU instructions on same VLES as ISAP instructions
move.l (r0)+,d0 {INC K0}
; not allowed {INC K0} is an ISAP instruction
add d0,d1,d2 {INC K0}
; allowed, “add” is not an AGU instruction
{MOVE.L D0,K0}
; allowed. The core assembler generates an
; implicit AGU move from d0
Rule G.P.9
All ISAP ALU instructions in a VLES must belong to the same IFc group. ISAP instructions that generate
implicit AGU instructions are subject to Rule G.P.6. See more on conditionally executed ISAP
instructions in
Section 6.7.3, “Conditional Execution.”
Example 7-24. ISAP instructions in same IFc group
ift {isap_one}
iff {isap_two}
;not allowed
ift move.w d3,(r4)
iff {move_special} {isap_two}
;allowed
ift move.l d2,(r1)
iff add d3,d4
{isap_ins}
;allowed