Multiple isap coding -65 – Freescale Semiconductor StarCore SC140 User Manual
Page 245
Core Assembly Syntax with an ISAP
SC140 DSP Core Reference Manual
6-65
Example 6-5. Multiple ISAP coding
Two VLES lines that use an explicit ISAP ID string, for two different ISAPs:
mac d0,d1,d3 IP{isap_instruction k0,k1,k2}
mac d0,d1,d3 FP{isap_instruction k0,k1,k2}
In this example, three parallel instructions are used for each line:
1st - mac = a core instruction
2nd - IP or FP = instructs the ISAP controller to which ISAP the following instruction belongs
3rd - isap_instruction = a fictional ISAP instruction, used here for illustration purposes only
Note that the ISAP’s registers names could have the same indication (k0,k1,k2), but are actually different
registers because they belong to different ISAPs.
Multiple ISAPs in a Multi-Line VLES
In this example, there are multiple ISAPs connected to the core, therefore each ISAP has a unique ID
string. The two ISAPs that are connected in parallel are a Floating Point ISAP (FP) and an Image
Processing ISAP (IP):
[
mac d0,d1,d3
IP{isap_instruction k0,k1,k2}
]
[
mac d0,d1,d3
FP{isap_instruction k0,k1,k2}
]
In this example, in the first execution set the core performs a parallel MAC instruction and the Floating
Point ISAP executes its own instruction. In the second execution set, the core performs a MAC instruction,
and the Image Processing ISAP executes its own instruction.
6.7.2 An Example of the Definition Flexibility of an ISAP
When assembling a data move instruction to the ISAP, the assembler generates a parallel AGU instruction
that will handle the address generation (for memory moves), immediate value generation or core register
drive/sample. The ISAP portion of the instruction is responsible for ISAP register activation. These ISAP
instructions are normally designated with MOVE mnemonics, as described in
However, the ISAP architect can define special move instructions that involve additional processing of the
data before or after a memory accesses which is related to it. This example shows how flexible and
powerful the ISAP can be, and demonstrates a MOVE instruction that includes other tasks in the same
opcode:
nop {permute_lsb_set.2l (r0)+,k0} abs d0