Macus, Fractional multiply-accumulate, Operation assembler syntax – Freescale Semiconductor StarCore SC140 User Manual
Page 555

MACUS
SC140 DSP Core Reference Manual
A-241
MACUS
Fractional Multiply-Accumulate
MACUS
Unsigned By Signed (DALU)
Description
Status and Conditions that Affect Instruction
None.
Status and Conditions Changed by Instruction
Example
macus d0,d1,d4
2
–15
$0001
x 1.100 $C000
1.111 1111 1111 1111 1000$FFFF 8000
0.011 1111 1111 1111 1000$3FFF 8000
0.011 1111 1111 1111 0000$3FFF
Operation
Assembler Syntax
Dn + (Dc.L * Dd.H)
→ Dn
MACUS Dc,Dd,Dn
MACUS Dc,Dd,Dn
Performs signed fractional multiplication of the unsigned 16-bit LP of one data register (Dc) in a register
pair by the signed 16-bit HP of the other data register (Dd). It then adds the sign-extended 32-bit product to
a data register (Dn).
Register Address
Bit Name
Description
Ln
L
Clears the Ln bit in the destination register.
EMR[2]
DOVF
Set if the result cannot be represented in 40 bits.
Register/Memory Address
Before
After
D0
$00 0000 0001
D1
$FF C000 0000
L4:D4
$0:$00 3FFF 8000
$0:$00 3fff 0000
EMR
$0000 0000