Decge, Decrement and set t, Instruction formats and opcodes – Freescale Semiconductor StarCore SC140 User Manual
Page 458: Operation assembler syntax
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SC140 DSP Core Reference Manual
DECGE
DECGE
Decrement and Set T
DECGE
If Greater Than or Equal to Zero (DALU)
Description
Status and Conditions that Affect Instruction
None.
Status and Conditions Changed by Instruction
Example
decge
Instruction Formats and Opcodes
Note:
** indicates serial grouping encoding.
Operation
Assembler Syntax
Dn – 1
→ Dn; Dn≥0 → T
DECGE Dn
DECGE Dn
Decrements a data register (Dn) and sets the T bit if the result is greater than or equal to zero. In the case of
an arithmetic overflow (DECGE on the value $80 0000 0000), the T bit will not be set.
Register Address
Bit Name
Description
SR[0]
C
Calculates and updates the carry bit in the status register.
SR[1]
T
Set if result
≥ 0, cleared otherwise.
EMR[2]
DOVF
Set if the result cannot be represented in 40 bits.
Ln
L
Clears the Ln bit in the destination register.
Instruction
SR
d3
move.w #$1,d3 ;$00E4 0000
$00 0000 0001
decge d3
;$00E4 0002 T-bit set
$00 0000 0000
decge d3
;$00E4 0001 T-bit cleared, carry bit set $FF FFFF FFFF
Instruction
Words Cycles Type
Opcode
15
8
7
0
DECGE Dn
1
1
1
0
*
1
0
0
1
F
F
F
1
1
0
1
1
0
0